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PIC18F46J11 FAMILY

DS39932D-page 12

2011 Microchip Technology Inc.

1.1.4

EXTENDED INSTRUCTION SET

The PIC18F46J11 family implements the optional

extension to the PIC18 instruction set, adding eight

new instructions and an Indexed Addressing mode.

Enabled as a device configuration option, the extension

has been specifically designed to optimize re-entrant

application code originally developed in high-level

languages, such as C.

1.1.5

EASY MIGRATION

Regardless of the memory size, all devices share the

same rich set of peripherals, allowing for a smooth

migration path as applications grow and evolve.

The consistent pinout scheme used throughout the

entire family also aids in migrating to the next larger

device.

The PIC18F46J11 family is also pin compatible with

other PIC18 families, such as the PIC18F4620,

PIC18F4520 and PIC18F45J10. This allows a new

dimension to the evolution of applications, allowing

developers to select different price points within

Microchip’s PIC18 portfolio, while maintaining the

same feature set.

1.2

Other Special Features

Communications: The PIC18F46J11 family

incorporates a range of serial and parallel

communication peripherals. This device also

includes two independent Enhanced USARTs and

two Master Synchronous Serial Port (MSSP)

modules, capable of both Serial Peripheral Inter-

face (SPI) and I2C (Master and Slave) modes of

operation. The device also has a parallel port and

can be configured to serve as either a Parallel

Master Port (PMP) or as a Parallel Slave Port

(PSP).

ECCP Modules: All devices in the family

incorporate three Enhanced

Capture/Compare/PWM (ECCP) modules to

maximize flexibility in control applications. Up to

four different time bases may be used to perform

several different operations at once. Each of the

ECCPs offers up to four PWM outputs, allowing for

a total of eight PWMs. The ECCPs also offer many

beneficial features, including polarity selection, pro-

grammable dead time, auto-shutdown and restart

and Half-Bridge and Full-Bridge Output modes.

10-Bit A/D Converter: This module incorporates

programmable acquisition time, allowing for a

channel to be selected and a conversion to be

initiated without waiting for a sampling period, and

thus, reducing code overhead.

Extended Watchdog Timer (WDT): This

enhanced version incorporates a 16-bit prescaler,

allowing an extended time-out range that is stable

across operating voltage and temperature. See

Section 29.0 “Electrical Characteristics”

for

time-out periods.

1.3

Details on Individual Family

Devices

Devices in the PIC18F46J11 family are available in

28-pin and 44-pin packages. Block diagrams for the

two groups are shown in Figure 1-1 and Figure 1-2.

The devices are differentiated from each other in two

ways:

Flash program memory (three sizes: 16 Kbytes

for the PIC18FX4J11, 32 Kbytes for PIC18FX5J11

devices and 64 Kbytes for PIC18FX6J11)

I/O ports (three bidirectional ports on 28-pin

devices, five bidirectional ports on 44-pin devices)

All other features for devices in this family are identical.

These are summarized in Table 1-1 and Table 1-2.

The pinouts for the PIC18F2XJ11 devices are listed in

Table 1-3 and the pinouts for the PIC18F4XJ11 devices

are listed in Table 1-4.

The PIC18F46J11 family of devices provides an

on-chip voltage regulator to supply the correct voltage

levels to the core. Parts designated with an “F” part

number (such as PIC18F46J11) have the voltage

regulator enabled.

These parts can run from 2.15V-3.6V on VDD, but should

have the VDDCORE pin connected to VSS through a

low-ESR capacitor. Parts designated with an “LF” part

number (such as PIC18LF46J11) do not enable the volt-

age regulator. For “LF” parts, an external supply of

2.0V-2.7V has to be supplied to the VDDCORE pin with

2.0V-3.6V supplied to VDD (VDDCORE should never

exceed VDD).

For more details about the internal voltage regulator,

see Section 26.3 “On-Chip Voltage Regulator”.

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